Implementation of a Self-Timed Segmented Bus

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1246163

November/December 2003 (vol. 20 no. 6) pp. 44-50

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Juha Plosila Articles by Tiberiu Seceleanu Articles by Pasi Liljeberg

	ASCII Text	x
	Juha Plosila, Tiberiu Seceleanu, Pasi Liljeberg, "Implementation of a Self-Timed Segmented Bus," IEEE Design and Test of Computers, vol. 20, no. 6, pp. 44-50, November/December, 2003.

	BibTex	x
	@article{ 10.1109/MDT.2003.1246163, author = {Juha Plosila and Tiberiu Seceleanu and Pasi Liljeberg}, title = {Implementation of a Self-Timed Segmented Bus}, journal ={IEEE Design and Test of Computers}, volume = {20}, number = {6}, issn = {0740-7475}, year = {2003}, pages = {44-50}, doi = {http://doi.ieeecomputersociety.org/10.1109/MDT.2003.1246163}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - MGZN JO - IEEE Design and Test of Computers TI - Implementation of a Self-Timed Segmented Bus IS - 6 SN - 0740-7475 SP44 EP50 EPD - 44-50 A1 - Juha Plosila, A1 - Tiberiu Seceleanu, A1 - Pasi Liljeberg, PY - 2003 VL - 20 JA - IEEE Design and Test of Computers ER -

Juha Plosila, University of Turku

Tiberiu Seceleanu, University of Turku

Pasi Liljeberg, University of Turku

Editor's note:The authors propose an asynchronous structure for implementation on a SoC. An intersegment topological arrangement preserves parallelization and, through a so-called central arbiter, efficiently organizes communication with high signaling speed in the proposed structure.

—Fabrizio Lombardi, Northeastern University

Citation:

Juha Plosila, Tiberiu Seceleanu, Pasi Liljeberg, "Implementation of a Self-Timed Segmented Bus," IEEE Design and Test of Computers, vol. 20, no. 6, pp. 44-50, Nov./Dec. 2003, doi:10.1109/MDT.2003.1246163

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.