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A process logic for distributed system synthesis
Singapore December 05-December 08
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/APSEC.2000.896684Seventh Asia-Pacific Software Enginee ...
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Y. Isobe, Electrotech. Lab., Ibaraki, Japan
K. Ohmaki, Electrotech. Lab., Ibaraki, Japan
We define a process algebra DS@ to formally describe distributed systems and a process logic SP@ to formally describe their specifications. Then, we present a method to synthesize a distributed system (described in DS@) from given specifications (described in SP@). The main contribution is to show how to check the satisfiability of process logic in which concurrent behavior is distinct from interleaving behavior (i.e. considering true concurrency).
Index Terms:
process algebra; concurrency theory; algebraic specification; computability; process logic; distributed system synthesis; process algebra; satisfiability; concurrent behavior; interleaving behavior; DS algebra; SP logic
Citation:
Y. Isobe, K. Ohmaki, "A process logic for distributed system synthesis," apsec, pp.62, Seventh Asia-Pacific Software Engineering Conference (APSEC'00), 2000
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