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The SNAP Project: Towards Sub-Nanosecond Arithmetic
Bath, England July 19-July 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ARITH.1995.46537412th IEEE Symposium on Computer Arith ...
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M. J. Flynn, Stanford University
K. Nowka, Stanford University
G. Bewick, Stanford University
E. Schwarz, Stanford University
N. Quach, Stanford University
SNAP - the Stanford subnanosecond arithmetic processor - is an interdisciplinary effort to develop theory, tools, and technology for realizing an arithmetic processor with execution rates under 1 ns. Specific improvements in clocking methods, floating-point addition algorithms, floating-point multiplication algorithms, division and higher-level function algorithms, design tools, and packaging technology were studied. These improvements have been demonstrated in the implementation of several VLSI designs.
Index Terms:
computer arithmetic, wave pipelining, floating-point arithmetic, floating-point addition, floating-point multiplication
Citation:
M. J. Flynn, K. Nowka, G. Bewick, E. Schwarz, N. Quach, "The SNAP Project: Towards Sub-Nanosecond Arithmetic," arith, pp.75, 12th IEEE Symposium on Computer Arithmetic (ARITH-12 '95), 1995
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