Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication

Adelaide, Australia April 14-April 16

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http://doi.ieeecomputersociety.org/10.1109/ARITH.1999.762841

14th IEEE Symposium on Computer Arith ...

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	ASCII Text	x
	Reto Zimmermann, "Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication," Computer Arithmetic, IEEE Symposium on, pp. 158, 14th IEEE Symposium on Computer Arithmetic (ARITH-14 '99), 1999.

	BibTex	x
	@article{ 10.1109/ARITH.1999.762841, author = {Reto Zimmermann}, title = {Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication}, journal ={Computer Arithmetic, IEEE Symposium on}, volume = {0}, year = {1999}, issn = {1063-6889}, pages = {158}, doi = {http://doi.ieeecomputersociety.org/10.1109/ARITH.1999.762841}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer Arithmetic, IEEE Symposium on TI - Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication SN - 1063-6889 SP EP A1 - Reto Zimmermann, PY - 1999 KW - Modulo (2^n=B11) adders and multipliers KW - end-around-carry parallel-prefix adders KW - computer arithmetic KW - VLSI circuits KW - RNS KW - IDEA cipher KW - cryptography VL - 0 JA - Computer Arithmetic, IEEE Symposium on ER -

Reto Zimmermann

Index Terms:

Modulo (2^n=B11) adders and multipliers, end-around-carry parallel-prefix adders, computer arithmetic, VLSI circuits, RNS, IDEA cipher, cryptography

Citation:

Reto Zimmermann, "Efficient VLSI Implementation of Modulo (2^n=B11) Addition and Multiplication," arith, pp.158, 14th IEEE Symposium on Computer Arithmetic (ARITH-14 '99), 1999

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