Diagnosing Single Faults for Interconnects in SRAM Based FPGAs

Wanchai, Hong Kong January 18-January 21

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/ASPDAC.1999.760014

Asia and South Pacific Design Automat ...

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Yinlei Yu Articles by Jian Xu Articles by Wei Kang Huang Articles by Fabrizio Lombardi

	ASCII Text	x
	Yinlei Yu, Jian Xu, Wei Kang Huang, Fabrizio Lombardi, "Diagnosing Single Faults for Interconnects in SRAM Based FPGAs," Asia and South Pacific Design Automation Conference, pp. 283, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999.

	BibTex	x
	@article{ 10.1109/ASPDAC.1999.760014, author = {Yinlei Yu and Jian Xu and Wei Kang Huang and Fabrizio Lombardi}, title = {Diagnosing Single Faults for Interconnects in SRAM Based FPGAs}, journal ={Asia and South Pacific Design Automation Conference}, volume = {0}, year = {1999}, isbn = {0-7803-5012-X}, pages = {283}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.1999.760014}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asia and South Pacific Design Automation Conference TI - Diagnosing Single Faults for Interconnects in SRAM Based FPGAs SN - 0-7803-5012-X SP EP A1 - Yinlei Yu, A1 - Jian Xu, A1 - Wei Kang Huang, A1 - Fabrizio Lombardi, PY - 1999 KW - FPGA KW - testing KW - fault model KW - fault diagnosis VL - 0 JA - Asia and South Pacific Design Automation Conference ER -

Yinlei Yu, Fudan University, Shanghai, China

Jian Xu, Fudan University, Shanghai, China

Wei Kang Huang, Fudan University, Shanghai, China

Fabrizio Lombardi, Northeastern University, Boston, MA

This paper presents a method to diagnose faults in FPGA interconnection resources. A single fault model is given. Under the given model, a diagnosing method is proposed. At most five programming steps in the proposed method is required if adaptive testing scheme is used. For non-adaptive test, eight programming steps is required to diagnose all the possible faults under the given single fault model. The accuracy of the fault diagnosing is one segment for a segment stuck-at or stuck-open fault, a segment pair for a bridge fault, a switch for switch stuck-on or stuck-off fault.

Index Terms:

FPGA, testing, fault model, fault diagnosis

Citation:

Yinlei Yu, Jian Xu, Wei Kang Huang, Fabrizio Lombardi, "Diagnosing Single Faults for Interconnects in SRAM Based FPGAs," asp-dac, pp.283, Asia and South Pacific Design Automation Conference 1999 (ASP-DAC'99), 1999

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.