In this paper we describe a complete design methodology for a globally asynchronous on-chip communication network connecting both locally synchronous and asynchronous modules. Synchronous modules are equipped with asynchronous wrappers, which adapt their interfaces to the self-timed environment and prevent meta-stability. These wrappers are assembled from a concise library of pre-designed technology-independent elements and provide high-speed data transfer. We confirmed the validity of our concept by applying it to an ASIC design implementing the Safer crypto-algorithm.