Enhancing multiple fault diagnosis in combinational circuits based on sensitized paths and EB testing

Bangalore, India November 23-November 24

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http://doi.ieeecomputersociety.org/10.1109/ATS.1995.485317

Fourth Asian Test Symposium (ATS'95)

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	ASCII Text	x
	H. Takahashi, N. Yanagida, Y. Takamatsu, "Enhancing multiple fault diagnosis in combinational circuits based on sensitized paths and EB testing," Asian Test Symposium, pp. 58, Fourth Asian Test Symposium (ATS'95), 1995.

	BibTex	x
	@article{ 10.1109/ATS.1995.485317, author = {H. Takahashi and N. Yanagida and Y. Takamatsu}, title = {Enhancing multiple fault diagnosis in combinational circuits based on sensitized paths and EB testing}, journal ={Asian Test Symposium}, volume = {0}, year = {1995}, isbn = {0-8186-7129-7}, pages = {58}, doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.1995.485317}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asian Test Symposium TI - Enhancing multiple fault diagnosis in combinational circuits based on sensitized paths and EB testing SN - 0-8186-7129-7 SP EP A1 - H. Takahashi, A1 - N. Yanagida, A1 - Y. Takamatsu, PY - 1995 KW - combinational circuits; fault diagnosis; logic testing; fault location; electron beam testing; VLSI; multiple fault diagnosis; combinational circuits; sensitized paths; EB testing; TP-1; TP-2; TP-3; TP-4; electron-beam tester; fault location; stuck-at faults; internal lines; diagnostic resolution VL - 0 JA - Asian Test Symposium ER -

H. Takahashi, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan

N. Yanagida, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan

Y. Takamatsu, Dept. of Comput. Sci., Ehime Univ., Matsuyama, Japan

In this paper, we improve the previous method by enhancing a set of diagnostic tests and using an EB testing method. We first enhance the previous set of diagnostic tests to one of diagnostic tests consisting of the four sets, TP-1, TP-2, TP-3 and TP-4. We next present two diagnostic methods by using the enhanced diagnostic tests and an electron-beam tester (EB-tester). Experimental results show that the presented method identified fault locations within 0.2 to 5% of all stuck-at faults on all lines in the circuit by probing about 0.8 to 15% internal lines.

Index Terms:

combinational circuits; fault diagnosis; logic testing; fault location; electron beam testing; VLSI; multiple fault diagnosis; combinational circuits; sensitized paths; EB testing; TP-1; TP-2; TP-3; TP-4; electron-beam tester; fault location; stuck-at faults; internal lines; diagnostic resolution

Citation:

H. Takahashi, N. Yanagida, Y. Takamatsu, "Enhancing multiple fault diagnosis in combinational circuits based on sensitized paths and EB testing," ats, pp.58, Fourth Asian Test Symposium (ATS'95), 1995

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