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DC control and observation structures for analog circuits
Bangalore, India November 23-November 24
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.1995.485326Fourth Asian Test Symposium (ATS'95)
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Yeong-Ruey Shieh, Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
Cheng- Wen Wu, Dept. of Electr. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
As the complexity of electronic circuits and systems increases, so does the complexity of testing them. The level-sensitive scan-design (LSSD) structure used in a digital circuit enhances the controllability and observability of the circuit under test. For analog circuits, there also are several approaches proposed to improve their observability, based on the LSSD concept. However, none of these approaches provide control and observation capability for all test points simultaneously. In this paper, we propose two control and observation structures for analog circuits without using extra power supply. Using our approach, one is able to observe and control the DC voltage levels of all test points simultaneously, which is the basic diagnosis capability for the analog circuit under test. A calibration process is presented to ensure the accuracy of the excitation and read-out voltage levels.
Index Terms:
mixed analogue-digital integrated circuits; VLSI; calibration; fault diagnosis; integrated circuit testing; controllability; observability; analog circuits; level-sensitive scan-design; controllability; observability; test points; DC voltage levels; diagnosis capability; calibration process; read-out voltage levels; VLSI; mixed signal circuits
Citation:
Yeong-Ruey Shieh, Cheng- Wen Wu, "DC control and observation structures for analog circuits," ats, pp.120, Fourth Asian Test Symposium (ATS'95), 1995
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