Waveform Polynomial Manipulation Using Bdds

Hsinchu, TAIWAN November 20-November 22

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http://doi.ieeecomputersociety.org/10.1109/ATS.1996.555150

Fifth Asian Test Symposium (ATS'96)

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	ASCII Text	x
	Zhuxing Zhao, Zhongcheng Li, Yinghua Min, "Waveform Polynomial Manipulation Using Bdds," Asian Test Symposium, pp. 136, Fifth Asian Test Symposium (ATS'96), 1996.

	BibTex	x
	@article{ 10.1109/ATS.1996.555150, author = {Zhuxing Zhao and Zhongcheng Li and Yinghua Min}, title = {Waveform Polynomial Manipulation Using Bdds}, journal ={Asian Test Symposium}, volume = {0}, year = {1996}, issn = {1081-7735}, pages = {136}, doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.1996.555150}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asian Test Symposium TI - Waveform Polynomial Manipulation Using Bdds SN - 1081-7735 SP EP A1 - Zhuxing Zhao, A1 - Zhongcheng Li, A1 - Yinghua Min, PY - 1996 KW - high level synthesis; waveform polynomial manipulation; digital circuit; design verification and test; binary decision diagram; Boolean process; middle size circuits; timing; logic design; logic synthesis; complexity; directed acyclic graph; data structure; combinational circuit VL - 0 JA - Asian Test Symposium ER -

Zhuxing Zhao, Inst. of Comput. Technol., Acad. Sinica, Beijing, China

Zhongcheng Li, Inst. of Comput. Technol., Acad. Sinica, Beijing, China

Yinghua Min, Inst. of Comput. Technol., Acad. Sinica, Beijing, China

A waveform polynomial for a digital circuit integrates both logic and timing information. It is applicable to design verification and test. This paper introduces a compact and manageable form, BPBDD, to represent and manipulate Boolean process based on BDDs, and shows how to construct a BPBDD representing a waveform polynomial for a given circuit. Experimental results show that BPBDD is capable of handling circuits of middle size efficiently. Although it is more complicated than OBDDs, more information about a circuit is available.

Index Terms:

high level synthesis; waveform polynomial manipulation; digital circuit; design verification and test; binary decision diagram; Boolean process; middle size circuits; timing; logic design; logic synthesis; complexity; directed acyclic graph; data structure; combinational circuit

Citation:

Zhuxing Zhao, Zhongcheng Li, Yinghua Min, "Waveform Polynomial Manipulation Using Bdds," ats, pp.136, Fifth Asian Test Symposium (ATS'96), 1996

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