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On The Tradeoff Between Number of Clocks and Number of Latches in Shift Registers
Akita, JAPAN November 17-November 18
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.1997.643973Sixth Asian Test Symposium (ATS'97)
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Jacob Savir, New Jersey Institute of Technology
This paper shows a new family of shift register designs which enjoys a reduced latch count. Reduction in the latch count is achieved by introducing additional clocks. The reduction in latch count may reach the ultimate savings of 50%.
Citation:
Jacob Savir, "On The Tradeoff Between Number of Clocks and Number of Latches in Shift Registers," ats, pp.296, Sixth Asian Test Symposium (ATS'97), 1997
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