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Power supply current monitoring techniques for testing PLLs
Akita, JAPAN November 17-November 18
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.1997.643984Sixth Asian Test Symposium (ATS'97)
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M. Dalmia, Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC, Canada
A. Ivanov, Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC, Canada
S. Tabatabaei, Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC, Canada
The effectiveness of current testing for digital IC's has led researchers to explore the possibility of extending this concept to testing analog blocks of mixed-signal ICs. Unfortunately, test techniques developed for commonly-studied analog blocks such as op-amps and filters do not apply to non-linear blocks such as phase-locked loops. This paper focuses on investigating the effectiveness of using an operating power supply current monitoring technique to detect potential faults in a phase-locked loop (PLL) circuit.
Index Terms:
phase locked loops; power supply current monitoring; PLL testing; current testing; digital IC; mixed-signal ICs; nonlinear circuits; phase-locked loops; fault detection; VCO testing; analogue circuit testing
Citation:
M. Dalmia, A. Ivanov, S. Tabatabaei, "Power supply current monitoring techniques for testing PLLs," ats, pp.366, Sixth Asian Test Symposium (ATS'97), 1997
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