M.A. Gharaybeh, V.D. Agrawal, M.L. Bushnell,
"False-Path Removal Using Delay Fault Simulation,"
Asian Test Symposium, pp. 82, Seventh Asian Test Symposium (ATS'98), 1998.
BibTex
x
@article{
10.1109/ATS.1998.741593, author = {M.A. Gharaybeh and V.D. Agrawal and M.L. Bushnell}, title = {False-Path Removal Using Delay Fault Simulation}, journal ={Asian Test Symposium}, volume = {0}, year = {1998}, issn = {1081-7735}, pages = {82}, doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.1998.741593}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }
RefWorks Procite/RefMan/Endnote
x
TY - CONF JO - Asian Test Symposium TI - False-Path Removal Using Delay Fault Simulation SN - 1081-7735 SP EP A1 - M.A. Gharaybeh, A1 - V.D. Agrawal, A1 - M.L. Bushnell, PY - 1998 VL - 0 JA - Asian Test Symposium ER -
M.A. Gharaybeh, V.D. Agrawal, M.L. Bushnell, "False-Path Removal Using Delay Fault Simulation," ats, pp.82, Seventh Asian Test Symposium (ATS'98), 1998
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