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Design and Simulation of a RISC-Based 32-bit Embedded On-Board Computer
Singapore December 02-December 04
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.1998.741649Seventh Asian Test Symposium (ATS'98)
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Zhen Guo, Chinese Academy of Space Technology
He Li, Chinese Academy of Space Technology
Shuling Guo, Chinese Academy of Space Technology
Dongsheng Wang, Chinese Academy of Space Technology
This paper presents the design and simulation method for developing a RISC-based 32-bit embedded on-board computer. Instead of the conventional bread-boarded prototype:(1) we used the Cadence EDA environment and Logic Modeling hardware simulator to verify the conceptual design (2) An Aptix FPCB was used to implement the first-version hardware system. (3) a simple but effective self-made ICE (In- circuit Emulator) was used to perform target system verification while software was running on IDT 79S381 Evaluation Board. The whole hardware system was first simulated conceptually under EDA environment, and then was simulated with the basic software codes. This method is effective in an embedded system design.
Index Terms:
Design, Simulation, EDA, RISC, Embedded System, Hardware/Software
Citation:
Zhen Guo, He Li, Shuling Guo, Dongsheng Wang, "Design and Simulation of a RISC-Based 32-bit Embedded On-Board Computer," ats, pp.413, Seventh Asian Test Symposium (ATS'98), 1998
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