loading...
Defining SRAM Resistive Defects and Their Simulation Stimuli
Shanghai, China November 16-November 18
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.1999.810726Eighth Asian Test Symposium (ATS'99)
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
A.J. van de Goor, Delft University of Technology
J.E. Simonse, Delft University of Technology
This paper presents a structured way of deriving new functional fault models, based on the insertion of resistive defects into the electrical schematic of an SRAM. A taxonomy of the set of possible electrical faults is given, a set of primitive patterns to drive the electrical level simulator is derived, the existing notation for functional faults is revisited, and simulation results prove the existence of new functional faults.
Index Terms:
Resistive defects, SPICE simulation, simulation stimuli, SRAM functional faults
Citation:
A.J. van de Goor, J.E. Simonse, "Defining SRAM Resistive Defects and Their Simulation Stimuli," ats, pp.33, Eighth Asian Test Symposium (ATS'99), 1999
Usage of this product signifies your acceptance of the Terms of Use.