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Enhancing BIST Quality of Sequential Machines through Degree-of-Freedom Analysis
Kyoto, Japan November 19-November 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2001.99029710th Asian Test Symposium (ATS'01)
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Biplab K Sikdar, Bengal Engineering College
Samir Roy, Kalyani Government Engineering College
Debesh K Das, Jadavpur University
Designing BIST structure for sequential circuits is rather a complex problem as some states remain unreachable and some act as the sink under any input sequence. This paper reports an efficient scheme to provide uniform mobility, referred to as degree of freedom, in a sequential machine by enhancing the reachability as well as the emitability of the states. The uniform mobility of states ensures higher fault efficiency in a BIST structure of the circuit. Moreover, as a non-scan scheme, the technique provides lower test application time and at-speed testing.
Citation:
Biplab K Sikdar, Samir Roy, Debesh K Das, "Enhancing BIST Quality of Sequential Machines through Degree-of-Freedom Analysis," ats, pp.285, 10th Asian Test Symposium (ATS'01), 2001
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