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MD-SCAN Method for Low Power Scan Testing
Guam, USA November 18-November 20
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2002.118169011th Asian Test Symposium (ATS'02)
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Takaki Yoshida, Masafumi Watari, "MD-SCAN Method for Low Power Scan Testing," Asian Test Symposium, pp. 80, 11th Asian Test Symposium (ATS'02), 2002.
 
 
BibTex
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@article{ 10.1109/ATS.2002.1181690,
author = {Takaki Yoshida and Masafumi Watari},
title = {MD-SCAN Method for Low Power Scan Testing},
journal ={Asian Test Symposium},
volume = {0},
year = {2002},
issn = {1081-7735},
pages = {80},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2002.1181690},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Asian Test Symposium
TI - MD-SCAN Method for Low Power Scan Testing
SN - 1081-7735
SP
EP
A1 - Takaki Yoshida,
A1 - Masafumi Watari,
PY - 2002
KW - null
VL - 0
JA - Asian Test Symposium
ER -
 
Takaki Yoshida, Matsushita Electric Industrial Co., Ltd.
Masafumi Watari, Matsushita Electric Industrial Co., Ltd.
As semiconductor manufacturing technology advances, power dissipation and noise in scan testing have become critical problems. Our studies on practical manufacturing show that power supply voltage drop causes testing problems during shift operations in scan testing. In this paper, we present a new testing method named MD-SCAN (Multi Duty-Scan) which solves power supply voltage drop problems, as well as its experimental results applied to practical LSI chips.
Citation:
Takaki Yoshida, Masafumi Watari, "MD-SCAN Method for Low Power Scan Testing," ats, pp.80, 11th Asian Test Symposium (ATS'02), 2002
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