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A New Learning Approach to Design Fault Tolerant ANNs: Finally a Zero HW-SW Overhead
Guam, USA November 18-November 20
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2002.118171411th Asian Test Symposium (ATS'02)
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Fabian Vargas, Catholic University - PUCRS
Djones Lettnin, Catholic University - PUCRS
Diogo Brum, Catholic University - PUCRS
Dárcio Prestes, Catholic University - PUCRS
We present a new approach to design fault tolerant artificial neural networks (ANNs). Additionally, this approach allows estimating the final network reliability. This approach is based on the Mutation Analysis technique and is used during the training process of the ANN. The basic idea is to train the ANN in the presence of faults (single-fault model is assumed). To do so, a set of faults is injected into the code describing the ANN. This procedure yields mutation versions of the original ANN code, which in turn are used to train the network in an iterative process with the designer until the moment when the ANN is no more sensible to the single faults injected. In other words, the network became tolerant to the considered set of faults. A practical example where an ANN is used to recognize electrocardiogram (ECG) and to measure ECG parameters illustrates the proposed methodology.
Keywords: Artificial Neural Networks; Mutation Analysis; Fault-Tolerant Computing Systems; Reliability Estimation; Electrocardiogram Recognition.
Citation:
Fabian Vargas, Djones Lettnin, Diogo Brum, Dárcio Prestes, "A New Learning Approach to Design Fault Tolerant ANNs: Finally a Zero HW-SW Overhead," ats, pp.218, 11th Asian Test Symposium (ATS'02), 2002
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