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Software-Based Delay Fault Testing of Processor Cores
Xi?an, China November 16-November 19
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2003.125078512th Asian Test Symposium (ATS'03)
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Virendra Singh, Michiko Inoue, Kewal K Saluja, Hideo Fujiwara, "Software-Based Delay Fault Testing of Processor Cores," Asian Test Symposium, pp. 68, 12th Asian Test Symposium (ATS'03), 2003.
 
 
BibTex
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@article{ 10.1109/ATS.2003.1250785,
author = {Virendra Singh and Michiko Inoue and Kewal K Saluja and Hideo Fujiwara},
title = {Software-Based Delay Fault Testing of Processor Cores},
journal ={Asian Test Symposium},
volume = {0},
year = {2003},
issn = {1081-7735},
pages = {68},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2003.1250785},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Asian Test Symposium
TI - Software-Based Delay Fault Testing of Processor Cores
SN - 1081-7735
SP
EP
A1 - Virendra Singh,
A1 - Michiko Inoue,
A1 - Kewal K Saluja,
A1 - Hideo Fujiwara,
PY - 2003
KW - null
VL - 0
JA - Asian Test Symposium
ER -
 
Virendra Singh, Nara Institute of Science and Technology and Central Electronics Engineering Research Institute
Michiko Inoue, Nara Institute of Science and Technology
Kewal K Saluja, University of Wisconsin-Madison
Hideo Fujiwara, Nara Institute of Science and Technology
This paper presents a software-based self-testing methodology for delay fault testing. Delay faults affect the circuit functionality only when it can be activated in functional mode. A systematic approach for the generation of test vectors, which are applicable in functional mode, is presented. A graph theoretic model (represented by IEGraph) is developed in order to model the datapath. A finite state machine model is used for the controller. These models are used for constraint extraction so that the generated test can be applied in functional mode.
Citation:
Virendra Singh, Michiko Inoue, Kewal K Saluja, Hideo Fujiwara, "Software-Based Delay Fault Testing of Processor Cores," ats, pp.68, 12th Asian Test Symposium (ATS'03), 2003
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