loading...
A Time Domain Built-In Self-Test Methodology for SNDR and ENOB Tests of Analog-to-Digital Converters
Kenting, Taiwan November 15-November 17
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ATS.2004.1813th Asian Test Symposium (ATS'04)
 This Article 
 
PDF
HTML
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Hsin-Wen Ting, National Cheng Kung University
Bin-Da Liu, National Cheng Kung University
Soon-Jyh Chang, National Cheng Kung University
In this paper, a built-in self-test (BIST) methodology used to test the important transmission parameters, signal-to-noise-and-distortion (SNDR) and effective number of bits (ENOB), of analog-to-digital converters (ADCs) is proposed. A sigma-delta modulation based signal generator is presented which can concurrently produce high frequency analog sinusoidal test stimuli and digital sinusoidal reference signals on chip. Unlike conventional test methods which compute these parameters based on the spectrum information after fast Fourier transformation (FFT), the presented BIST scheme can directly determine the noise-and-distortion power density and SNDR in time domain. It can reduce the high cost of implementing FFT and windowing functional blocks, and alleviate the difficulty in setting the test frequencies and measurement conditions.
Citation:
Hsin-Wen Ting, Bin-Da Liu, Soon-Jyh Chang, "A Time Domain Built-In Self-Test Methodology for SNDR and ENOB Tests of Analog-to-Digital Converters," ats, pp.52-57, 13th Asian Test Symposium (ATS'04), 2004
Usage of this product signifies your acceptance of the Terms of Use.