Efficient 3D Modelling for Extraction of Interconnect Capacitances in Deep Submicron Dense Layouts

Munich, Germany March 09-March 12

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http://doi.ieeecomputersociety.org/10.1109/DATE.1999.761185

Design, Automation and Test in Europe ...

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	ASCII Text	x
	A. Toulouse, D. Bernard, C. Landrault, P. Nouet, "Efficient 3D Modelling for Extraction of Interconnect Capacitances in Deep Submicron Dense Layouts," Design, Automation and Test in Europe Conference and Exhibition, pp. 576, Design, Automation and Test in Europe (DATE '99), 1999.

	BibTex	x
	@article{ 10.1109/DATE.1999.761185, author = {A. Toulouse and D. Bernard and C. Landrault and P. Nouet}, title = {Efficient 3D Modelling for Extraction of Interconnect Capacitances in Deep Submicron Dense Layouts}, journal ={Design, Automation and Test in Europe Conference and Exhibition}, volume = {0}, year = {1999}, issn = {1530-1591}, pages = {576}, doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.1999.761185}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Design, Automation and Test in Europe Conference and Exhibition TI - Efficient 3D Modelling for Extraction of Interconnect Capacitances in Deep Submicron Dense Layouts SN - 1530-1591 SP EP A1 - A. Toulouse, A1 - D. Bernard, A1 - C. Landrault, A1 - P. Nouet, PY - 1999 VL - 0 JA - Design, Automation and Test in Europe Conference and Exhibition ER -

This paper introduces a set of analytical formulations for 3D modelling of inter-layer capacitances. Efficiency and accuracy are both guaranteed by the process characterization approach. Analytical modelling of interconnect capacitances is then demonstrated to be an helpful alternative to lookup tables or numerical simulations.

Citation:

A. Toulouse, D. Bernard, C. Landrault, P. Nouet, "Efficient 3D Modelling for Extraction of Interconnect Capacitances in Deep Submicron Dense Layouts," date, pp.576, Design, Automation and Test in Europe (DATE '99), 1999

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