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CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip
Paris, France March 27-March 30
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2000.840030Design, Automation and Test in Europe ...
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Mounir Benabdenebi, Walid Maroufi, Meryem Marzouki, "CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip," Design, Automation and Test in Europe Conference and Exhibition, pp. 141, Design, Automation and Test in Europe (DATE '00), 2000.
 
 
BibTex
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@article{ 10.1109/DATE.2000.840030,
author = {Mounir Benabdenebi and Walid Maroufi and Meryem Marzouki},
title = {CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {0},
year = {2000},
issn = {1530-1591},
pages = {141},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2000.840030},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip
SN - 1530-1591
SP
EP
A1 - Mounir Benabdenebi,
A1 - Walid Maroufi,
A1 - Meryem Marzouki,
PY - 2000
VL - 0
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Mounir Benabdenebi, LIP6 Laboratory
Walid Maroufi, LIP6 Laboratory
Meryem Marzouki, LIP6 Laboratory
This paper describes CAS-BUS, a P1500 compatible Test Access Mechanism for Systems on a Chip. The TAM architecture is made up of a Core Access Switch (CAS) and a test bus. The TAM characteristics are its flexibility, scalability and reconfigurability. A CAS generator has been developed, and some results are provided in the paper.
Citation:
Mounir Benabdenebi, Walid Maroufi, Meryem Marzouki, "CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip," date, pp.141, Design, Automation and Test in Europe (DATE '00), 2000
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