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System Level Specification in Lava
Munich, Germany March 03-March 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2003.10058Design, Automation and Test in Europe ...
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Satnam Singh, "System Level Specification in Lava," Design, Automation and Test in Europe Conference and Exhibition, vol. 1, pp. 10370, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003.
 
 
BibTex
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@article{ 10.1109/DATE.2003.10058,
author = {Satnam Singh},
title = {System Level Specification in Lava},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {1},
year = {2003},
issn = {1530-1591},
pages = {10370},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2003.10058},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - System Level Specification in Lava
SN - 1530-1591
SP
EP
A1 - Satnam Singh,
PY - 2003
KW - null
VL - 1
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Satnam Singh, Xilinx Inc.
The Lava system provides novel techniques for representing system level specifications which are supported by a design flow that maps Lava descriptions onto System-on-Chip platforms implemented on very large FPGAs. The key contribution of this paper is a type class based approach for specifying bus-based system configurations. This provides a very flexible and parameterised flow for combining pre-designed IP blocks into a complete FPGA-based system.
Citation:
Satnam Singh, "System Level Specification in Lava," date, vol. 1, pp.10370, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003
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