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Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design
Munich, Germany March 03-March 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2003.10159Design, Automation and Test in Europe ...
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Agnes Madalinski, Alex Bystrov, Victor Khomenko, Alex Yakovlev, "Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design," Design, Automation and Test in Europe Conference and Exhibition, vol. 1, pp. 10926, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003.
 
 
BibTex
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@article{ 10.1109/DATE.2003.10159,
author = {Agnes Madalinski and Alex Bystrov and Victor Khomenko and Alex Yakovlev},
title = {Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {1},
year = {2003},
issn = {1530-1591},
pages = {10926},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2003.10159},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design
SN - 1530-1591
SP
EP
A1 - Agnes Madalinski,
A1 - Alex Bystrov,
A1 - Victor Khomenko,
A1 - Alex Yakovlev,
PY - 2003
KW - null
VL - 1
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Agnes Madalinski, University of Newcastle upon Tyne
Alex Bystrov, University of Newcastle upon Tyne
Victor Khomenko, University of Newcastle upon Tyne
Alex Yakovlev, University of Newcastle upon Tyne
Synthesis of asynchronous circuits from Signal Transition Graphs (STGs) involves resolving state coding conflicts. The refinement process is generally done automatically using heuristics and often produces sub-optimal solutions, which have to be corrected manually. This paper presents a framework for an interactive refinement process aimed to help the designer. It is based on the visualization of conflict cores, i.e., sets of transitions causing coding conflicts, which are represented at the level of finite and complete prefixes of STG unfoldings.
Citation:
Agnes Madalinski, Alex Bystrov, Victor Khomenko, Alex Yakovlev, "Visualization and Resolution of Coding Conflicts in Asynchronous Circuit Design," date, vol. 1, pp.10926, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003
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