loading...
Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip
Munich, Germany March 03-March 07
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2003.10020Design, Automation and Test in Europe ...
 This Article 
 
Buy PURCHASE ARTICLE: $19
PDF
HTML
IEEE Xplore Subscribers
 
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
ASCII Text
x 
 
J-Y. Mignolet, V. Nollet, P. Coene, D. Verkest, S. Vernalde, R. Lauwereins, "Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip," Design, Automation and Test in Europe Conference and Exhibition, vol. 1, pp. 10986, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003.
 
 
BibTex
x
 
@article{ 10.1109/DATE.2003.10020,
author = {J-Y. Mignolet and V. Nollet and P. Coene and D. Verkest and S. Vernalde and R. Lauwereins},
title = {Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {1},
year = {2003},
issn = {1530-1591},
pages = {10986},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2003.10020},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip
SN - 1530-1591
SP
EP
A1 - J-Y. Mignolet,
A1 - V. Nollet,
A1 - P. Coene,
A1 - D. Verkest,
A1 - S. Vernalde,
A1 - R. Lauwereins,
PY - 2003
KW - null
VL - 1
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
J-Y. Mignolet, IMEC vzw
V. Nollet, IMEC vzw
P. Coene, IMEC vzw
D. Verkest, IMEC vzw, Katholieke Universiteit Leuven and Vrije Universiteit Brussel
S. Vernalde, IMEC vzw
R. Lauwereins, IMEC vzw and Katholieke Universiteit Leuven
The ability to (re)schedule a task either in hardware or software will be an important asset in a reconfigurable systems-on-chip. To support this feature we have developed an infrastructure that, combined with a suitable design environment permits the implementation and management of hardware/software relocatable tasks. This paper presents the general scope of our research, and details the communication scheme, the design environment and the hardware/software context switching issues. The infrastructure proved its feasibility by allowing us to design a relocatable video decoder. When implemented on an embedded platform, the decoder performs at 23 frames/s (320x240 pixels, 16 bits per pixel) in reconfigurable hardware and 6 frames/s in software.
Citation:
J-Y. Mignolet, V. Nollet, P. Coene, D. Verkest, S. Vernalde, R. Lauwereins, "Infrastructure for Design and Management of Relocatable Tasks in a Heterogeneous Reconfigurable System-on-Chip," date, vol. 1, pp.10986, Design, Automation and Test in Europe Conference and Exhibition (DATE'03), 2003
Usage of this product signifies your acceptance of the Terms of Use.