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Hierarchical Automatic Behavioral Model Generation of Nonlinear Analog Circuits Based on Nonlinear Symbolic Techniques
Paris, France February 16-February 20
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268886Design, Automation and Test in Europe ...
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Lutz Näthke, University of Hanover
Volodymyr Burkhay, University of Hanover
Lars Hedrich, University of Hanover
Erich Barke, University of Hanover
We present an extended method of automatic behavioral model generation for nonlinear analog circuits. The focus is on a decrease of simulation time. A procedural model formulation approach is introduced, together with a new simpli.cation method based on the recognition of physical transistor properties of the element models. The simplification process is performed with respect to simulation time, and a hierarchical modeling approach is proposed. The result of these extensions are models with an obvious speed-up in simulation time compared to the simulation of the original netlists.
Citation:
Lutz Näthke, Volodymyr Burkhay, Lars Hedrich, Erich Barke, "Hierarchical Automatic Behavioral Model Generation of Nonlinear Analog Circuits Based on Nonlinear Symbolic Techniques," date, vol. 1, pp.10442, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004
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