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Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology
Paris, France February 16-February 20
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268953Design, Automation and Test in Europe ...
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Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araújo, "Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology," Design, Automation and Test in Europe Conference and Exhibition, vol. 1, pp. 10734, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004.
 
 
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@article{ 10.1109/DATE.2004.1268953,
author = {Pablo Viana and Edna Barros and Sandro Rigo and Rodolfo Azevedo and Guido Araújo},
title = {Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {1},
year = {2004},
issn = {1530-1591},
pages = {10734},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268953},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology
SN - 1530-1591
SP
EP
A1 - Pablo Viana,
A1 - Edna Barros,
A1 - Sandro Rigo,
A1 - Rodolfo Azevedo,
A1 - Guido Araújo,
PY - 2004
KW - null
VL - 1
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Pablo Viana, CIn - UFPE
Edna Barros, CIn - UFPE
Sandro Rigo, IC-UNICAMP
Rodolfo Azevedo, IC-UNICAMP
Guido Araújo, IC-UNICAMP
This paper presents an environment based on SystemC for architecture specification of programmable systems. Making use of the new architecture description language ArchC, able to capture the processor description as well as the memory subsystem configuration, this environment offers support for system-level specification, intended for platform-based design. As a case study, it is presented the memory architecture exploration for a simple image processing application, yet a more robust environment evaluation is performed through the execution of some real-world benchmarks.
Citation:
Pablo Viana, Edna Barros, Sandro Rigo, Rodolfo Azevedo, Guido Araújo, "Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology," date, vol. 1, pp.10734, Design, Automation and Test in Europe Conference and Exhibition Volume I (DATE'04), 2004
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