An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration

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http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268998

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	Andrei Rădulescu, John Dielissen, Kees Goossens, Edwin Rijpkema, Paul Wielage, "An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration," Design, Automation and Test in Europe Conference and Exhibition, vol. 2, pp. 20878, Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04), 2004.

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	@article{ 10.1109/DATE.2004.1268998, author = {Andrei Rădulescu and John Dielissen and Kees Goossens and Edwin Rijpkema and Paul Wielage}, title = {An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration}, journal ={Design, Automation and Test in Europe Conference and Exhibition}, volume = {2}, year = {2004}, issn = {1530-1591}, pages = {20878}, doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1268998}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

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	TY - CONF JO - Design, Automation and Test in Europe Conference and Exhibition TI - An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration SN - 1530-1591 SP EP A1 - Andrei Rădulescu, A1 - John Dielissen, A1 - Kees Goossens, A1 - Edwin Rijpkema, A1 - Paul Wielage, PY - 2004 KW - null VL - 2 JA - Design, Automation and Test in Europe Conference and Exhibition ER -

Andrei Rădulescu, Philips Research Laboratories

John Dielissen, Philips Research Laboratories

Kees Goossens, Philips Research Laboratories

Edwin Rijpkema, Philips Research Laboratories

Paul Wielage, Philips Research Laboratories

In this paper we present a network interface for an on-chip network. Our network interface decouples computation from communication by offering a shared-memory abstraction, which is independent of the network implementation. We use a transaction-based protocol to achieve backward compatibility with existing bus protocols such as AXI, OCP and DTL. Our network interface has a modular architecture, which allows flexible instantiation. It provides both guaranteed and best-effort services via connections. These are configured via network interface ports using the network itself, instead of a separate control interconnect. An example instance of this network interface with 4 ports has an area of 0.143mm² in a 0.13?m technology, and runs at 500 MHz.

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Andrei Rădulescu, John Dielissen, Kees Goossens, Edwin Rijpkema, Paul Wielage, "An Efficient On-Chip Network Interface Offering Guaranteed Services, Shared-Memory Abstraction, and Flexible Network Configuration," date, vol. 2, pp.20878, Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04), 2004

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