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Dynamic Voltage and Cache Reconfiguration for Low Power
Paris, France February 16-February 20
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1269096Design, Automation and Test in Europe ...
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Andre C. Nacul, Tony Givargis, "Dynamic Voltage and Cache Reconfiguration for Low Power," Design, Automation and Test in Europe Conference and Exhibition, vol. 2, pp. 21376, Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04), 2004.
 
 
BibTex
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@article{ 10.1109/DATE.2004.1269096,
author = {Andre C. Nacul and Tony Givargis},
title = {Dynamic Voltage and Cache Reconfiguration for Low Power},
journal ={Design, Automation and Test in Europe Conference and Exhibition},
volume = {2},
year = {2004},
issn = {1530-1591},
pages = {21376},
doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1269096},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Design, Automation and Test in Europe Conference and Exhibition
TI - Dynamic Voltage and Cache Reconfiguration for Low Power
SN - 1530-1591
SP
EP
A1 - Andre C. Nacul,
A1 - Tony Givargis,
PY - 2004
KW - null
VL - 2
JA - Design, Automation and Test in Europe Conference and Exhibition
ER -
 
Andre C. Nacul, University of California at Irvine
Tony Givargis, University of California at Irvine
In this work, we propose a combined Dynamic Voltage Scaling (DVS) and Dynamic Cache Reconfiguration (DCR) online algorithm that dynamically adapts the processor speed (i.e., voltage) and the cache subsystem to the workload requirements for the purposes of saving energy. The workload is considered to be a set of tasks with real-time deadlines. Our online algorithm is invoked as part of the OS scheduler, which performs standard earliest deadline first (EDF) task scheduling first. Then, our online algorithm, determines an ideal voltage/cache configuration for the current executing task.
Citation:
Andre C. Nacul, Tony Givargis, "Dynamic Voltage and Cache Reconfiguration for Low Power," date, vol. 2, pp.21376, Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04), 2004
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