CMOS Structures Suitable for Secured Hardware

Paris, France February 16-February 20

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http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1269113

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	ASCII Text	x
	Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet, Jean Provost, "CMOS Structures Suitable for Secured Hardware," Design, Automation and Test in Europe Conference and Exhibition, vol. 2, pp. 21414, Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04), 2004.

	BibTex	x
	@article{ 10.1109/DATE.2004.1269113, author = {Sylvain Guilley and Philippe Hoogvorst and Yves Mathieu and Renaud Pacalet and Jean Provost}, title = {CMOS Structures Suitable for Secured Hardware}, journal ={Design, Automation and Test in Europe Conference and Exhibition}, volume = {2}, year = {2004}, issn = {1530-1591}, pages = {21414}, doi = {http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1269113}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Design, Automation and Test in Europe Conference and Exhibition TI - CMOS Structures Suitable for Secured Hardware SN - 1530-1591 SP EP A1 - Sylvain Guilley, A1 - Philippe Hoogvorst, A1 - Yves Mathieu, A1 - Renaud Pacalet, A1 - Jean Provost, PY - 2004 KW - null VL - 2 JA - Design, Automation and Test in Europe Conference and Exhibition ER -

Sylvain Guilley, GET/Télécom Paris, CNRS LTCI

Philippe Hoogvorst, GET/Télécom Paris, CNRS LTCI

Yves Mathieu, GET/Télécom Paris, CNRS LTCI

Renaud Pacalet, GET/Télécom Paris, CNRS LTCI

Jean Provost, GET/Télécom Paris, CNRS LTCI

Unsecured electronic circuits leak physical syndromes correlated to the data they handle. Side-channels attacks, like SPA or DPA, exploit this information leakage. We provide balanced and memoryless CMOS structures for a 2-input secured NAND gate.

Citation:

Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet, Jean Provost, "CMOS Structures Suitable for Secured Hardware," date, vol. 2, pp.21414, Design, Automation and Test in Europe Conference and Exhibition Volume II (DATE'04), 2004

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