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An Inductance Modeling Flow Seamlessly Integrated in the RF IC Design Chain
Paris, France February 16-February 20
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DATE.2004.1269196Design, Automation and Test in Europe ...
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Sotiris Bantas, Helic S.A.
Apostolos Liapis, Helic S.A.
A novel design flow is introduced based on an efficient inductance modeler, supporting RLCk extraction for spiral inductors, transformers and RF interconnect lines. The modeler operates on a set of EM-derived algorithms that can model complex cross-coupled devices on any silicon substrate rapidly and reliably. A design flow is set up in Cadence SKILL, integrating the inductance modeler with the layout editor and RCX extraction tools. Spiral inductor parametric cells are provided, that can be extracted with full connectivity in a single netlist along with other layout devices and parasitics. The resulting netlist includes mutual coupling (k) elements and is produced automatically without need for user intervention or back-annotation. Measured results on RF silicon circuitry showcase the accuracy and efficiency of the inductance modeling flow. The introduced flow can evolve into a platform for RF Intellectual Property (IP) evaluation and trade.
Citation:
Sotiris Bantas, Yorgos Koutsoyannopoulos, Apostolos Liapis, "An Inductance Modeling Flow Seamlessly Integrated in the RF IC Design Chain," date, vol. 3, pp.30039, Design, Automation and Test in Europe Conference and Exhibition Designers? Forum (DATE'04), 2004
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