Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA

Christchurch, New Zealand January 29-January 31

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http://doi.ieeecomputersociety.org/10.1109/DELTA.2002.994634

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	ASCII Text	x
	M. Renovell, P. Faure, P. Prinetto, Y. Zorian, "Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA," Electronic Design, Test and Applications, IEEE International Workshop on, pp. 297, The First IEEE International Workshop on Electronic Design, Test and Applications (DELTA '02), 2002.

	BibTex	x
	@article{ 10.1109/DELTA.2002.994634, author = {M. Renovell and P. Faure and P. Prinetto and Y. Zorian}, title = {Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA}, journal ={Electronic Design, Test and Applications, IEEE International Workshop on}, volume = {0}, year = {2002}, isbn = {0-7695-1453-7}, pages = {297}, doi = {http://doi.ieeecomputersociety.org/10.1109/DELTA.2002.994634}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Electronic Design, Test and Applications, IEEE International Workshop on TI - Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA SN - 0-7695-1453-7 SP EP A1 - M. Renovell, A1 - P. Faure, A1 - P. Prinetto, A1 - Y. Zorian, PY - 2002 KW - FPGA KW - Test VL - 0 JA - Electronic Design, Test and Applications, IEEE International Workshop on ER -

M. Renovell, LIRMM - UM2

P. Faure, LIRMM - UM2

P. Prinetto, Polytecnico de Torino

Y. Zorian, Logic Vision Inc.

This paper proposes a new and original solution to test the uni-dimensionnal interconnect architecture of a RAM based FPGA by exploring the specific properties of these blocks. The method to find a reduced set of configurations is proposed and the sequence of test vectors required for each configuration is given.

Index Terms:

FPGA, Test

Citation:

M. Renovell, P. Faure, P. Prinetto, Y. Zorian, "Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA," delta, pp.297, The First IEEE International Workshop on Electronic Design, Test and Applications (DELTA '02), 2002

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