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Xilinx Virtex II Pro Implementation of a Reconfigurable UMTS Digital Channel Filter
Perth, Australia January 28-January 30
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DELTA.2004.10058Second IEEE International Workshop on ...
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J. Chandran, Victoria University
R. Kaluri, Victoria University
J. Singh, Victoria University
V. Owall, Victoria University
R. Veljanovski, Victoria University
A reconfigurable digital root raised cosine (RRC) filter for a UMTS terrestrial radio access (UTRA) mobile terminal receiver is implemented on a Xilinx Vitrex II Pro Field Programmable Gate Array (FPGA). The filter employs a finite impulse response (FIR) and monitors in-band and out-of-band received signal powers and calculates the appropriate filter length that meets the bit-energy to interference ratio (Eb/No) of the system. The results presented are for the time division duplex (TDD) mode of UTRA.
Citation:
J. Chandran, R. Kaluri, J. Singh, V. Owall, R. Veljanovski, "Xilinx Virtex II Pro Implementation of a Reconfigurable UMTS Digital Channel Filter," delta, pp.77, Second IEEE International Workshop on Electronic Design, Test and Applications, 2004
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