Array Codes Correcting a Cluster of Unidirectional Errors for Two-Dimensional Matrix Symbols

Boston, Massachusetts November 03-November 05

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http://doi.ieeecomputersociety.org/10.1109/DFTVS.2003.1250118

18th IEEE International Symposium on ...

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	Haruhiko Kaneko, Eiji Fujiwara, "Array Codes Correcting a Cluster of Unidirectional Errors for Two-Dimensional Matrix Symbols," Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on, pp. 242, 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003.

	BibTex	x
	@article{ 10.1109/DFTVS.2003.1250118, author = {Haruhiko Kaneko and Eiji Fujiwara}, title = {Array Codes Correcting a Cluster of Unidirectional Errors for Two-Dimensional Matrix Symbols}, journal ={Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on}, volume = {0}, year = {2003}, issn = {1063-6722}, pages = {242}, doi = {http://doi.ieeecomputersociety.org/10.1109/DFTVS.2003.1250118}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on TI - Array Codes Correcting a Cluster of Unidirectional Errors for Two-Dimensional Matrix Symbols SN - 1063-6722 SP EP A1 - Haruhiko Kaneko, A1 - Eiji Fujiwara, PY - 2003 KW - null VL - 0 JA - Defect and Fault-Tolerance in VLSI Systems, IEEE International Symposium on ER -

Haruhiko Kaneko, Tokyo Institute of Technology

Eiji Fujiwara, Tokyo Institute of Technology

This paper proposes two-dimensional unidirectional clustered error correcting codes suitable for high-density two-dimensional matrix symbols. These codes are capable of correcting unidirectional errors confined in a rectangle having l_m rows and l_n columns. Evaluation shows that the proposed codes have smaller number of check bits than the existing codes.

Citation:

Haruhiko Kaneko, Eiji Fujiwara, "Array Codes Correcting a Cluster of Unidirectional Errors for Two-Dimensional Matrix Symbols," dft, pp.242, 18th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'03), 2003

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