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Compression of VLSI Test Data by Arithmetic Coding
Cannes, France October 10-October 13
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DFT.2004.1819th IEEE International Symposium on ...
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H. Hashempour, Northeastern University, Boston, Mass
F. Lombardi, Northeastern University, Boston, Mass
This paper presents Arithmetic Coding and its application to data compression for VLSI testing. The use of arithmetic codes for compression results in a codeword whose length is close to the optimal value as predicted by entropy in information theory. Previous techniques (such as those based on Huffman or Golomb coding) result in optimal codes for test data sets in which the probability model of the symbols satisfies specific requirements. We show that Huffman and Golomb codes result in large difference between entropy bound and sustained compression. We present compression results of arithmetic coding for circuits through a practical integer implementation of Arithmetic coding/decoding and analyze its deviation from entropy bound as well. A software implementation approach is proposed and studied in detail using industrial embedded DSP cores.
Citation:
H. Hashempour, F. Lombardi, "Compression of VLSI Test Data by Arithmetic Coding," dft, pp.150-157, 19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'04), 2004
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