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Evaluation of Transient Fault Susceptibility in Microprocessor Systems
Rennes, France August 31-September 03
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DSD.2004.1333307Euromicro Symposium on Digital System ...
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P. Gawkowski, J. Sosnowski, "Evaluation of Transient Fault Susceptibility in Microprocessor Systems," Digital Systems Design, Euromicro Symposium on, pp. 432-439, Euromicro Symposium on Digital System Design (DSD'04), 2004.
 
 
BibTex
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@article{ 10.1109/DSD.2004.1333307,
author = {P. Gawkowski and J. Sosnowski},
title = {Evaluation of Transient Fault Susceptibility in Microprocessor Systems},
journal ={Digital Systems Design, Euromicro Symposium on},
volume = {0},
year = {2004},
isbn = {0-7695-2203-3},
pages = {432-439},
doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2004.1333307},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Digital Systems Design, Euromicro Symposium on
TI - Evaluation of Transient Fault Susceptibility in Microprocessor Systems
SN - 0-7695-2203-3
SP432
EP439
A1 - P. Gawkowski,
A1 - J. Sosnowski,
PY - 2004
KW - null
VL - 0
JA - Digital Systems Design, Euromicro Symposium on
ER -
 
P. Gawkowski, Warsaw University of Technology
J. Sosnowski, Warsaw University of Technology
The paper addresses the problem of evaluating transient fault impact on COTS microprocessor systems. We present the problem of fault effect propagation from low logical to software and application levels. Such an analysis is needed to optimize error detection and correction mechanisms at hardware and software levels. For this purpose we use sophisticated fault injectors. The usefulness of the presented approach was proved in many experiments described in the paper. It may support hardware/software co-design.
Citation:
P. Gawkowski, J. Sosnowski, "Evaluation of Transient Fault Susceptibility in Microprocessor Systems," dsd, pp.432-439, Euromicro Symposium on Digital System Design (DSD'04), 2004
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