CASSE: A System-Level Modeling and Design-Space Exploration Tool for Multiprocessor Systems-on-Chip

Rennes, France August 31-September 03

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http://doi.ieeecomputersociety.org/10.1109/DSD.2004.1333313

Euromicro Symposium on Digital System ...

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	V?ctor Reyes, Tom?s Bautista, Gustavo Marrero, Pedro P. Carballo, Wido Kruijtzer, "CASSE: A System-Level Modeling and Design-Space Exploration Tool for Multiprocessor Systems-on-Chip," Digital Systems Design, Euromicro Symposium on, pp. 476-483, Euromicro Symposium on Digital System Design (DSD'04), 2004.

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	@article{ 10.1109/DSD.2004.1333313, author = {V?ctor Reyes and Tom?s Bautista and Gustavo Marrero and Pedro P. Carballo and Wido Kruijtzer}, title = {CASSE: A System-Level Modeling and Design-Space Exploration Tool for Multiprocessor Systems-on-Chip}, journal ={Digital Systems Design, Euromicro Symposium on}, volume = {0}, year = {2004}, isbn = {0-7695-2203-3}, pages = {476-483}, doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2004.1333313}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Digital Systems Design, Euromicro Symposium on TI - CASSE: A System-Level Modeling and Design-Space Exploration Tool for Multiprocessor Systems-on-Chip SN - 0-7695-2203-3 SP476 EP483 A1 - V?ctor Reyes, A1 - Tom?s Bautista, A1 - Gustavo Marrero, A1 - Pedro P. Carballo, A1 - Wido Kruijtzer, PY - 2004 KW - null VL - 0 JA - Digital Systems Design, Euromicro Symposium on ER -

V?ctor Reyes, University of Las Palmas GC, Spain

Tom?s Bautista, University of Las Palmas GC, Spain

Gustavo Marrero, University of Las Palmas GC, Spain

Pedro P. Carballo, University of Las Palmas GC, Spain

Wido Kruijtzer, Philips Research Laboratories, The Netherlands

As SoC complexity grows new methodologies and tools for system design and time-effective design space exploration are required. In this paper we introduce a tool called CASSE, what stands for CAmellia System-on-chip Simulation Environment. CASSE is a fast, flexible, and modular SystemC-based simulation environment which aims to be useful for design-space exploration and system-level design at different abstraction levels. The tool uses transaction-level modeling techniques for fast simulations and easy architectural modeling, and bridge the gap to system implementation by a progressive refinement approach.

CASSE is being used in the European IST-2001-34410 CAMELLIA project, which focuses on the mapping of innovative smart imaging applications onto an existing video encoding architecture.

Citation:

V?ctor Reyes, Tom?s Bautista, Gustavo Marrero, Pedro P. Carballo, Wido Kruijtzer, "CASSE: A System-Level Modeling and Design-Space Exploration Tool for Multiprocessor Systems-on-Chip," dsd, pp.476-483, Euromicro Symposium on Digital System Design (DSD'04), 2004

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