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Model-integrated parallel application synthesis
Monterey, CA March 24-March 28
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ECBS.1997.5817751997 Workshop on Engineering of Compu ...
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A. Lodeczi, Dept. of Electr. & Comput. Eng., Vanderbilt Univ., Nashville, TN, USA
Parallel computer architectures based on such processors as the Texas Instruments TMS320C40, or the Analog Devices ADSP21060, are characterized by high performance and I/O bandwidth, flexible topology and low cost making them ideal for embedded parallel signal processing and instrumentation applications. However, the software of such systems is difficult to manage by conventional software engineering methods because of the complexity of the large-scale parallel application and the flexibility of the hardware topology. This paper discusses the adoption of a model-integrated programming environment, the Multigraph Architecture (MGA), to this domain. By using the MGA, the parallel application is automatically synthesized from high-level system models and assigned to the available network of processors.
Index Terms:
software engineering; model-integrated parallel application synthesis; parallel computer architectures; Texas Instruments TMS320C40; Analog Devices ADSP21060; I/O bandwidth; flexible topology; embedded parallel signal processing; software engineering; complexity; hardware topology; model-integrated programming environment; Multigraph Architecture; high-level system models; network of processors
Citation:
A. Lodeczi, "Model-integrated parallel application synthesis," ecbs, pp.38, 1997 Workshop on Engineering of Computer-Based Systems (ECBS '97), 1997
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