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Multiprocessor DSP Scheduling in System-on-a-chip Architectures
Vienna, Austria June 19-June 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EMRTS.2002.101920314 th Euromicro Conference on Real-Ti ...
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Paolo Gai, Scuola Superiore S. Anna
Luca Abeni, Scuola Superiore S. Anna
Giorgio Buttazzo, University of Pavia

Next generation embedded systems will demand applications with increasing complexity, that a standard uniprocessor microcontroller architecture will likely be unsuited to support. A possible solution to cope with embedded applications with high computational requirements is to adopt multiple-processor-on-a-chip architectures.

This paper discusses the problem of multiprocessor scheduling for asymmetric architectures composed by a general purpose CPU and a DSP. The challenging issue addressed in this work is to verify whether the use of a dedicated processor can effectively enhance the performance of an embedded system still maintaining some kind of real-time guarantee. In particular, we provide a method for increasing the schedulability bound in the considered architecture, allowing a more efficient use of the computational resources.

Citation:
Paolo Gai, Luca Abeni, Giorgio Buttazzo, "Multiprocessor DSP Scheduling in System-on-a-chip Architectures," ecrts, pp.231, 14 th Euromicro Conference on Real-Time Systems (ECRTS'02), 2002
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