A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers

Pasadena, California July 19-July 21

DOI Bookmark:

http://doi.ieeecomputersociety.org/10.1109/EH.1999.785434

The First NASA/DOD Workshop on Evolva ...

	This Article
	PURCHASE ARTICLE: $19 PDF HTML IEEE Xplore Subscribers
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Arturo Hernández Aguirre Articles by Bill P. Buckles Articles by Carlos A. Coello

	ASCII Text	x
	Arturo Hernández Aguirre, Bill P. Buckles, Carlos A. Coello, "A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers," Evolvable Hardware, NASA/DoD Conference on, pp. 46, The First NASA/DOD Workshop on Evolvable Hardware, 1999.

	BibTex	x
	@article{ 10.1109/EH.1999.785434, author = {Arturo Hernández Aguirre and Bill P. Buckles and Carlos A. Coello}, title = {A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers}, journal ={Evolvable Hardware, NASA/DoD Conference on}, volume = {0}, year = {1999}, isbn = {0-7695-0256-3}, pages = {46}, doi = {http://doi.ieeecomputersociety.org/10.1109/EH.1999.785434}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Evolvable Hardware, NASA/DoD Conference on TI - A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers SN - 0-7695-0256-3 SP EP A1 - Arturo Hernández Aguirre, A1 - Bill P. Buckles, A1 - Carlos A. Coello, PY - 1999 VL - 0 JA - Evolvable Hardware, NASA/DoD Conference on ER -

Arturo Hernández Aguirre, Tulane University

Bill P. Buckles, Tulane University

Carlos A. Coello, Laboratorio Nacional de Inform?tica Avanzada

This paper presents an approach based on the use of genetic programming to synthesize logic functions. The proposed approach uses the 1-control line multiplexer as the only design unit, defining any logic function (defined by a truth table) through the replication of this single unit. Our fitness function first explores the search space trying to find a feasible design and then concentrates in the minimization of such (fully feasible) circuit. The proposed approach is illustrated using several sample Boolean functions.

Citation:

Arturo Hernández Aguirre, Bill P. Buckles, Carlos A. Coello, "A Genetic Programming Approach to Logic Function Synthesis by Means of Multiplexers," eh, pp.46, The First NASA/DOD Workshop on Evolvable Hardware, 1999

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.