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FeRAM Circuit Technology for System on a Chip
Pasadena, California July 19-July 21
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EH.1999.785453The First NASA/DOD Workshop on Evolva ...
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K. Asari, Y. Mitsuyama, T. Onoye, I. Shirakawa, H. Hirano, T. Honda, T. Otsuki, T. Baba, T. Meng, "FeRAM Circuit Technology for System on a Chip," Evolvable Hardware, NASA/DoD Conference on, pp. 193, The First NASA/DOD Workshop on Evolvable Hardware, 1999.
 
 
BibTex
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@article{ 10.1109/EH.1999.785453,
author = {K. Asari and Y. Mitsuyama and T. Onoye and I. Shirakawa and H. Hirano and T. Honda and T. Otsuki and T. Baba and T. Meng},
title = {FeRAM Circuit Technology for System on a Chip},
journal ={Evolvable Hardware, NASA/DoD Conference on},
volume = {0},
year = {1999},
isbn = {0-7695-0256-3},
pages = {193},
doi = {http://doi.ieeecomputersociety.org/10.1109/EH.1999.785453},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - CONF
JO - Evolvable Hardware, NASA/DoD Conference on
TI - FeRAM Circuit Technology for System on a Chip
SN - 0-7695-0256-3
SP
EP
A1 - K. Asari,
A1 - Y. Mitsuyama,
A1 - T. Onoye,
A1 - I. Shirakawa,
A1 - H. Hirano,
A1 - T. Honda,
A1 - T. Otsuki,
A1 - T. Baba,
A1 - T. Meng,
PY - 1999
VL - 0
JA - Evolvable Hardware, NASA/DoD Conference on
ER -
 
K. Asari, Matsushita Electronics Corp, Osaka University and Stanford University
Y. Mitsuyama, Osaka University
T. Onoye, Osaka University
I. Shirakawa, Osaka University
H. Hirano, Matsushita Electronics Corp.
T. Honda, Matsushita Electronics Corp.
T. Otsuki, Matsushita Electronics Corp.
T. Baba, Panasonic Technologies Inc.
T. Meng, Stanford University
The ferroelectric memory (FeRAM) has a great advantage for system on a chip, since FeRAM not only supports non-volatility but also delivers a fast memory access similar to that of DRAM. To enhance the applicability of FeRAM for embedded reconfigurable hardware, three circuit technologies are discussed in this paper. Simulation and measurement data confirmed that both power consumption and memory area can be substantially reduced, making FeRAM the most promising new technology for implementing high-performance, low-power reconfigurable hardware.
Citation:
K. Asari, Y. Mitsuyama, T. Onoye, I. Shirakawa, H. Hirano, T. Honda, T. Otsuki, T. Baba, T. Meng, "FeRAM Circuit Technology for System on a Chip," eh, pp.193, The First NASA/DOD Workshop on Evolvable Hardware, 1999
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