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Image Convolution on FPGAs: The Implementation of a Multi-FPGA FIFO Structure
Västerås, Sweden August 25-August 27
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EURMIC.1998.71178624 th. EUROMICRO Conference Volume 1 ...
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Arrigo Benedetti, Universit? di Modena and California Institute of Technology
Andrea Prati, Universit? di Modena
Nello Scarabottolo, Universit? di Modena
In this paper, we present an implementation of a real-time convolver, based on Field Programmable Gate Arrays (FPGA?s) to perform the convolution operations. Main characteristics of the proposed approach are the usage of external memory to implement a FIFO buffer where incoming pixels are stored and the partitioning of the convolution matrix among several FPGA?s, in order to allow data-parallel computation and to increase the size of the convolution kernel.
Citation:
Arrigo Benedetti, Andrea Prati, Nello Scarabottolo, "Image Convolution on FPGAs: The Implementation of a Multi-FPGA FIFO Structure," euromicro, vol. 1, pp.10123, 24 th. EUROMICRO Conference Volume 1 (EUROMICRO'98), 1998
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