In this paper, we present an environment for synthesis and simulation of the industrial digital system composed of the target microprocessor, memory and hardware devices. We use C++ for coding the program for the target microprocessor and VHDL for describing the operations in hardware. The presented system combines C++ compiler and VHDL tools for simulating the design. The applicability of the environment for performance estimation of the designed digital system is demonstrated.
Citation:
Gregor Polan?ek, Andrej ?emva, Andrej Trost, "HW/SW Co-Simulation of Target C++ Applications and Synthesizable HDL with Performance Estimation," euromicro, vol. 1, pp.1468, 25th Euromicro Conference (EUROMICRO '99)-Volume 1, 1999