In this paper, a new method for the optimization of combinational circuits by use of redundancy addition is investigated. In a first step adding modulo 2 carefully selected input variables to a subset of the circuit outputs modifies the original circuit, and the modified circuit is optimized by the tool SIS. Then the same input variables are added modulo 2 a second time to the corresponding outputs to restore the functionality of the original circuit. The proposed method results in an average area reduction of 4.1% with respect to the optimized original circuit.
Citation:
V. Ocheretnij, M. Goessel, Vl. Saposhnikov, V. Saposhnikov, "A New Method of Redundancy Addition for Circuit Optimization," euromicro, vol. 1, pp.1172, Proceedings of The 26th EUROMICRO Conference (EUROMICRO'00) Volume I-Volume 1, 2000