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An Effective Design System for Dynamically Reconfigurable Architectures
Napa Valley, California April 15-April 17
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.1998.707932IEEE Symposium on FPGAs for Custom Co ...
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The SPARCS system is an integrated partitioning and synthesis environment for reconfigurable architectures. In this paper, we use the Joint Photographic Experts Group (JPEG) image compression algorithm as a design example to demonstrate the effectiveness of dynamic reconfiguration achieved using SPARCS. We present a typical design process using the SPARCS system consisting of temporal partitioning, spatial partitioning, and design synthesis. The results, obtained on a commercial RC architecture, show that the multiply-reconfigured version of the JPEG compression algorithm achieves reasonable improvement in execution times compared to the one-time configured version.
Citation:
Sriram Govindarajan, Iyad Ouaiss, Meenakshi Kaul, Vinoo Srinivasan, Ranga Vemuri, "An Effective Design System for Dynamically Reconfigurable Architectures," fccm, pp.312, IEEE Symposium on FPGAs for Custom Computing Machines, 1998
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