Accelerating an IR Automatic Target Recognition Application with FPGAs

Napa California April 21-April 23

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http://doi.ieeecomputersociety.org/10.1109/FPGA.1999.803701

Seventh Annual IEEE Symposium on Fiel ...

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	Jack Jean, Xuejun Liang, Brian Drozd, Karen Tomko, "Accelerating an IR Automatic Target Recognition Application with FPGAs," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 290, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 1999.

	BibTex	x
	@article{ 10.1109/FPGA.1999.803701, author = {Jack Jean and Xuejun Liang and Brian Drozd and Karen Tomko}, title = {Accelerating an IR Automatic Target Recognition Application with FPGAs}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1999}, issn = {1082-3409}, pages = {290}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1999.803701}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - Accelerating an IR Automatic Target Recognition Application with FPGAs SN - 1082-3409 SP EP A1 - Jack Jean, A1 - Xuejun Liang, A1 - Brian Drozd, A1 - Karen Tomko, PY - 1999 KW - Automatic Target Recognition KW - Field Programmable Gate Array (FPGA) KW - Reconfigurable Computing KW - Adaptive Computing VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -

Jack Jean, Wright State University

Xuejun Liang, Wright State University

Brian Drozd, Wright State University

Karen Tomko, Wright State University

This two-page paper briefly describes the acceleration of an infrared automatic target recognition (IR ATR) application with an FPGA co-processor board, a Giga Operations' G900 board. The application of the IR ATR program which contains multiple rounds of computation is to locate and identify ground vehicles based on a single IR image frame. An FPGA design is developed for the first round which is the most time consuming part. The design explores parallelism at several levels. The achieved performance is reported and analyzed at the end.

Index Terms:

Automatic Target Recognition, Field Programmable Gate Array (FPGA), Reconfigurable Computing, Adaptive Computing

Citation:

Jack Jean, Xuejun Liang, Brian Drozd, Karen Tomko, "Accelerating an IR Automatic Target Recognition Application with FPGAs," fccm, pp.290, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 1999

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