A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor

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http://doi.ieeecomputersociety.org/10.1109/FPGA.1999.803707

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	Lijun Gao, Sarvesh Shrivastava, Hanho Lee, Gerald E. Sobelman, "A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 304, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 1999.

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	@article{ 10.1109/FPGA.1999.803707, author = {Lijun Gao and Sarvesh Shrivastava and Hanho Lee and Gerald E. Sobelman}, title = {A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {1999}, issn = {1082-3409}, pages = {304}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.1999.803707}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor SN - 1082-3409 SP EP A1 - Lijun Gao, A1 - Sarvesh Shrivastava, A1 - Hanho Lee, A1 - Gerald E. Sobelman, PY - 1999 KW - Elliptic curve cryptography KW - Scalar multiplication KW - Galois field KW - Reconfigurable hardware KW - FPGA KW - Coprocessor VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -

Lijun Gao, University of Minnesota

Sarvesh Shrivastava, University of Minnesota

Hanho Lee, University of Minnesota

Gerald E. Sobelman, University of Minnesota

A compact fast elliptic curve cryptosystem coprocessor with variable key size is implemented with a Xilinx FPGA. This implementation utilizes the internal SRAM/registers of the FPGA and has the whole system implemented within a single FPGA chip. The compact design helps reduce the overhead and limitations associated with data transfer between FPGA and host, and thus leads to high performance. The experimental data shows that the carefully constructed hardware architecture is regular and has high CLB utilization.

Index Terms:

Elliptic curve cryptography, Scalar multiplication, Galois field, Reconfigurable hardware, FPGA, Coprocessor

Citation:

Lijun Gao, Sarvesh Shrivastava, Hanho Lee, Gerald E. Sobelman, "A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor," fccm, pp.304, Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 1999

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