T. Yamauchi, S. Nakaya, T. Inuo, N. Kajihara,
"Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW,"
Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, pp. 281, 2000 IEEE Symposium on Field-Programmable Custom Computing Machines, 2000.
BibTex
x
@article{
10.1109/FPGA.2000.903921, author = {T. Yamauchi and S. Nakaya and T. Inuo and N. Kajihara}, title = {Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {2000}, issn = {1082-3409}, pages = {281}, doi = {http://doi.ieeecomputersociety.org/10.1109/FPGA.2000.903921}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }
RefWorks Procite/RefMan/Endnote
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TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW SN - 1082-3409 SP EP A1 - T. Yamauchi, A1 - S. Nakaya, A1 - T. Inuo, A1 - N. Kajihara, PY - 2000 VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -
T. Yamauchi, S. Nakaya, T. Inuo, N. Kajihara, "Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW," fccm, pp.281, 2000 IEEE Symposium on Field-Programmable Custom Computing Machines, 2000
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