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An FPGA-Based Array Processor for an Ionospheric-Imaging Radar
Napa, California April 17-April 19
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.2000.9034322000 IEEE Symposium on Field-Programm ...
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Tim Tuan, University of Washington
Miguel Figueroa, University of Washington
Frank Lind, University of Washington
Chucai Zhou, University of Washington
Chris Diorio, University of Washington
John Sahr, University of Washington
Atmospheric scientists need to observe fluctuations in the ionosphere, both to probe the underlying atmospheric physics, and to remove the effects of these fluctuations from other measurements. We have built an FPGA-based, pipelined array processor that allows us to make these observations, in real-time, using passive radar techniques. Our array processor time-multiplexes 16 multiply-accumulators across 1536 radar ranges, performing a pipelined correlation and integration of the radar signal for each range. A DSP-based postprocessor generates real-time range-Doppler profiles of the ionospheric targets.
Citation:
Tim Tuan, Miguel Figueroa, Frank Lind, Chucai Zhou, Chris Diorio, John Sahr, "An FPGA-Based Array Processor for an Ionospheric-Imaging Radar," fccm, pp.313, 2000 IEEE Symposium on Field-Programmable Custom Computing Machines, 2000
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