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System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems
Napa, California September 22-September 24
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FPGA.2002.110669010th Annual IEEE Symposium on Field-P ...
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Tero Rissa, Tampere University of Technology
Milan Vasilko, Bournemouth University
Jarkko Niittylahti, Tampere University of Technology
This paper presents a system-level approach for modelling and implementing hardware-software systems, which contain Run-Time Reconfigur able (RTR) hardware. The developed technique provides management and scheduling of RTR tasks from system-level simulations to synthesizable VHDL descriptions. The developed technique was implemented using OCAPI-xl — a system-level modelling and implementation tool based on C++ libraries. The proposed approach allows designers to explore the tradeoffs between implementation of system partitions in software, static hardware, and RTR hardware. After the system has been partitioned, an OCAPI-xl-based design flow can be utilized for implementation of all the system components.
Citation:
Tero Rissa, Milan Vasilko, Jarkko Niittylahti, "System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems," fccm, pp.295, 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'02), 2002
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