This paper briefly presents a block cipher encryption architecture and a reconfigurable logic based hardware design for the SCAN encryption algorithm. Detailed performance results are presented for still images as well as video, and the reconfigurable architecture is compared to software-only implementations of the same algorithm as well as a preliminary ASIC design.
Index Terms:
Encryption, FPGA, Reconfigurable, Architecture
Citation:
Apostolos Dollas, Christopher Kachris, Nikolaos Bourbakis, "Performance Analysis of Fixed, Reconfigurable, and Custom Architectures for the SCAN Image and Video Encryption Algorithm," fccm, pp.19, 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003